FPGA Development Tools Engineer - Intern
All the best with your application!
Want more jobs like this straight to your inbox?
Get Job Alerts
Get a curated list of the top robotics roles delivered straight to your inbox each week. We sift through hundreds of postings to find the high-salary positions, leading companies, and remote opportunities you actually want.
Unsubscribe anytime. We respect your privacy.
Summary
San Jose, United States
$105k-110k/year
Internship
Entry-level
About this Job
Job Details:
Job Description:
We are looking for a passionate and energetic Software Engineer-Intern to join our team atAltera®. Altera is the pioneer of programmable logic solutions, enabling system and semiconductor companies to rapidly and cost effectively innovate, differentiate and win in their markets. Altera combines theprogrammable logic technology with software tools, intellectual property, and customer support to provide high-value programmable solutions to many customers worldwide.
In this role, you will be researching/designing/developing/optimizing software forQuartus, the compiler that programs allcurrent/next generation of Field Programmable Gate Array(FPGA) devices.
Quartus is used by allFPGA acceleration technologies(including High Level Synthesis, FPGA AI Suite, DSP Builder,etc)
At the heart of Quartus is ourPlace and Routeengine which is responsible fortransforming HDL to bitssuch that a user's design isoptimized for area and Fmax
Cross-functional interactions with various customers (internal and external)
Best of both worlds,hardware and software:
Customer's hardware requirements:Fmax, throughput, timing closure and area
Compiler SW optimizations:runtime and memory, including abstractions and frameworks for acceleration with the FPGA for domains such as deep learning, DSP algorithms, or data analytics
As part of the Quartus team, your responsibilities will include, but are not limited to:
Developing softwaresupport for successful routing of thelatest next generation FPGA devices
Owning various modulesof thecompilerfromdevice modeling to timing closure to runtime
Implementing new featuresin addition to root-causing and fixing the existing ones, while maneuvering your way through a big code base
The pay range below is for Bay Area California only. Actual salary may vary based ona number offactors including job location, job-related knowledge, skills, experiences,trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.
$105K- $110KUSD
We use artificial intelligence to screen, assess, or select applicants for the position.Applicants must be eligible for any required U.S. export authorizations.
Qualifications:
Minimum Qualifications
The candidate must be currently pursuing a PhD in Electrical & Computer Engineering and experience in:
Developing softwaresupport for successful routing of thelatest next generation FPGA devices
Device modeling, timing closure and runtime
Implementing new featuresin addition to root-causing and fixing the existing ones
Job Type:
Student / Intern (Fixed Term)
Shift:
Shift 1 (United States of America)
Primary Location:
San Jose, California, United States
Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
About the Company
